Beta
×

Welcome to the Slashdot Beta site -- learn more here. Use the link in the footer or click here to return to the Classic version of Slashdot.

Thank you!

Before you choose to head back to the Classic look of the site, we'd appreciate it if you share your thoughts on the Beta; your feedback is what drives our ongoing development.

Beta is different and we value you taking the time to try it out. Please take a look at the changes we've made in Beta and  learn more about it. Thanks for reading, and for making the site better!

Want a FPGA Board For Your Raspberry Pi Or Beagle Bone?

timothy posted about 9 months ago | from the all-the-kids-talk-like-that-now dept.

Hardware 66

New submitter hamster_nz writes "Hot topics for the maker community are things such as embedded vision, Bitcoin mining, autonomous vehicle control, Arduino, Open Hardware, software defined radio, small ARM/Linux boards and reconfigurable computing. A current Kickstarter project, LOGi FPGA, is touching all these bases. Funding has been reached after just a day, and Kicktraq currently has it projected to reach over $133,000. As a long time FPGA enthusiast I'm very interested to see what will happen when a thousand keen users get together to explore programmable logic."

cancel ×

66 comments

Sorry! There are no comments related to the filter you selected.

Can it handle Improv (1)

Taco Cowboy (5327) | about 9 months ago | (#45701161)

If it can handle the "Improv" (as featured in Slashdot @ http://hardware.slashdot.org/story/13/11/25/2313224/dual-core-allwinner-a20-powered-eoma-68-engineering-card-available [slashdot.org] ) it will be wonderful !!

Re:Can it handle Improv (1)

Anonymous Coward | about 9 months ago | (#45701473)

America'd never b destroyed frm d outside. If v falter & lose r freedoms it'll b becoz v destroyed rselves

I'm almost on board for this whole fascist\socialist\KKK\theocratic take over if it will institute the death penalty for illiterate idiots who write gibberish like this.

Re:Can it handle Improv (-1)

Anonymous Coward | about 9 months ago | (#45701783)

Does Autonomous Cowherd needs hugzies? Widdle fuzzie hugzies for joooo!!1!!!1!

Re:Can it handle Improv (1)

fisted (2295862) | about 9 months ago | (#45702621)

You must be new here

Spartan-6 LX9 MicroBoard (2)

tftp (111690) | about 9 months ago | (#45701245)

If you need an FPGA then check out the Spartan-6 LX9 MicroBoard [xilinx.com] . It is sold today for $89. You can synthesize MicroBlaze there, and you will have enough fabric left over to implement quite a few hardware blocks. It may be cheaper than stacking R-Pi or BBB and the add-on board. The kit comes with everything that you need to code for this thing (Xilinx ISE and EDK.)

Re:Spartan-6 LX9 MicroBoard (4, Informative)

NixieBunny (859050) | about 9 months ago | (#45701275)

MicroBlaze doesn't provide anywhere near the CPU processing power that a Raspberry Pi provides. This project looks like a fine way to get some hardware acceleration on the standard open hacker computer platforms. You know, with Linux!

Re:Spartan-6 LX9 MicroBoard (0)

Anonymous Coward | about 9 months ago | (#45702061)

There's nothing stopping you using a bit of ribbon cable, or a piece of stripboard & some sockets, to interface *any* FPGA dev board to an RPi, or indeed *any* single board computer (I prefer the OLinuxIno range from olimex). You don't need an FPGA board that's designed specifically for your SBC.

Re:Spartan-6 LX9 MicroBoard (1)

ubergeek65536 (862868) | about 9 months ago | (#45704679)

The $99 Parallela board uses a Zynq FPGA that has a dual core ARM CPU. The $199 version has close to 10x the FPGA fabric of the LX9

Re:Spartan-6 LX9 MicroBoard (0)

Anonymous Coward | about 9 months ago | (#45701475)

And there's the excellent (open source) papilio board also: http://papilio.cc/

ZedBoard (1)

bob_super (3391281) | about 9 months ago | (#45701721)

Meh, that Spartan 6 isn't supported in the much-better Vivado tools.
I can't think of a better price-perf ratio than the ZedBoard for this kind of designs.

Of course, if price isn't an issue, a Xilinx VC7222 (8x 28G transceivers plus a few dozen 13G ones) is better bragging rights than a quad-SLI setup...

Re:Spartan-6 LX9 MicroBoard (1)

Anonymous Coward | about 9 months ago | (#45702039)

If you need an FPGA then check out the Spartan-6 LX9 MicroBoard [xilinx.com]. It is sold today for $89.

The DE0-nano is $79, and the Cyclone-IV 22kLE chip on it is much more capable than the Spartan-6 LX9.

Re:Spartan-6 LX9 MicroBoard (1)

Anonymous Coward | about 9 months ago | (#45703057)

You can get a Lattice MachXO Breakout Board for $20, with ~7000 gates that can run up into the 100s of MHz. Other boards might have more power, but if you want just an FPGA board to mess around with things, including open source CPU designs, that gives a lot cheaper starting point.

Spartan 6 LX9? (2, Insightful)

Anonymous Coward | about 9 months ago | (#45701263)

I would have considered it with an LX45 or better LX75. I'll probably go with a ZTEX http://www.ztex.de/ [www.ztex.de] 1.15b then instead. Is there anything comparable out there that I have missed so far?

Re:Spartan 6 LX9? (3, Informative)

hamster_nz (656572) | about 9 months ago | (#45701323)

You missed out Saanlima's Pipistrello [saanlima.com] . A nice Spartan LX45 board, with PMODs, HDMI and other goodies.

Re:Spartan 6 LX9? (0)

Anonymous Coward | about 9 months ago | (#45701829)

looks quite nice, but how about availability? I can only see the LX45 version in a single shop. Btw, the ZTEX also appers to be orders of magnitude better than this kickstarter trash, don't waste your money there. If you are okay with an LX9 you're better of with the Avnet Spartan-6 LX9 MicroBoard.

ObBetteridge (0)

Anonymous Coward | about 9 months ago | (#45701349)

No.

ZedBoard, SoCKIT (1)

Anonymous Coward | about 9 months ago | (#45701415)

The Xilinx Spartan-6 LX9 is a pretty small FPGA. People interested in ARM, Linux and programmable logic should take a look at two other development boards: the Avnet/Digilent ZedBoard (USD395, USD319 academic, has a Xilinx Zynq-7000 XC7Z020 FPGA which includes two ARM Cortex-A9 CPU cores @ 667 MHz on the same die), and the Arrow/Terasic SoCKIT (USD299, has an Altera Cyclone V FPGA with two ARM Cortex-A9 CPU cores @ 800 MHz).

http://zedboard.org/product/zedboard [zedboard.org]
https://www.digilentinc.com/Products/Detail.cfm?Prod=ZEDBOARD [digilentinc.com]
http://www.arrownac.com/solutions/sockit/ [arrownac.com]
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=816 [terasic.com.tw]

Re:ZedBoard, SoCKIT (3, Informative)

Pinhedd (1661735) | about 9 months ago | (#45701725)

I have both the Zedboard and the SoCKit

The SoCKit is definitely the beefier of the two, as the Altera Cyclone V SX series FPGAs are far more powerful than their Zynq-7000 series counterparts.

However, the SoCKit has the most obnoxiously bad documentation that I've ever seen. The reference material from Arrow is extremely thin yet somehow still manages to have spelling mistakes in it that would prevent it from functioning if certain functions were enabled. Terasic's material "works" but Terasic does not include any documentation on the HPS whatsoever, just a prebuilt image and some C code to go with it.

I've spent the better part of the past 3 weeks just figuring everything out on my own. Altera's documentation is rock solid, but that only covers the FPGA itself, not the peripherals. Today was spent figuring out how the various clock sources are connected to the FPGA. Despite offering the exact same board in the exact same configuration, Arrow and Terasic provide conflicting and equally useless documentation. Sometime in the next couple of days I'm going to go probing at it with my scope.

The silver lining though is that I've been documenting that I've done, so I should be able to compile a very comprehensive and updated getting started guide in the near future. The ones on the RocketBoards wiki just don't cut it.

The Zedboard is accompanied by much superior documentation. The board design isn't as nice, but it's not as irritating to work with.

Re:ZedBoard, SoCKIT (1)

volvox_voxel (2752469) | about 9 months ago | (#45701827)

I too have one of those SoC Boards. I would love to see your compiled errata & additional notes about how you were able to get it running. Is there / will there be a link somewhere we might have access to ? -Joe

Re:ZedBoard, SoCKIT (3, Informative)

Pinhedd (1661735) | about 9 months ago | (#45701959)

I haven't found any hardware errata yet, just a truckload of missing, poorly written, or conflicting documentation. I'll provide you with a rough workflow that I've followed to get started. Feel free to ask me any questions.

Step1: Grab the Arrow lab material from the following link and work through them on Quartus 13.1. They're written for Quartus 13.0sp1 but they can be followed on Quartus 13.1 without issue. The only additional step is upgrading the IP cores from those packaged with 13.0sp1 to those packaged with 13.1; this will be done automatically when the sopc is opened in Qsys

http://www.arrownac.com/solutions/sockit/files/SoCKIT_Materials.zip [arrownac.com]

Working through the hardware side will get you a usable sof file to program the FPGA. Working through the software side will get you a usable preloader. Although the SoCKit is heavily based off of Altera's reference development kit (GHRD) the preloader is different in large part due to slightly different SDRAM specifications. Attempting to use the preloader included in Altera's SoCEDS will not work.

The programming stage of the documentation is a bit flawed. The reference configuration assumes a single JTAG device, but there can be more. At a minimum there will be one for the HPS, but a bank of two dipswitches on the board can enable JTAG for the HPS itself and any devices connected via HSMC. Just use autodetect to pick up all JTAG devices and program the SOF file to the FPGA device, it's very clear as to which is which.

Next, grab the github repositories for the linux-socfpga (kernel), poky-socfpga (base filesystem), and u-boot-socfpga (bootloader). Grab the latest version tagged with '-rel'. I used the following:

kernel: socfpga-3.9-rel

u-boot: socfpga_v2013.01.01-rel

poky: danny-altera-rel

The wiki on rocketboards can be followed to install the dependencies and begin compilation. I can verify that everything builds nicely on CentOS 6.5 without much fuss, Ubuntu is extremely problematic so I would avoid it.

If you look at the SD Card image that ships with the SoCKit you'll notice that it has a FAT filesystem with two files on it, socfpga.dtb and uImage. These are the device-tree-blob, and linux-kernel-image respectively. The kernel is in a u-boot image format, which is simply a zImage with an additional header. The bootloader that ships with Terasic's SD card image uses an early 2012 version of u-boot and does not support booting directly from a zImage. Support for this (bootz command) is present in the 2013.01.01 release of u-boot so it is no longer necessary to attach the additional header to the kernel image. Just configure and compile the kernel as a zImage as they do in the wiki.

An additional step is missing in the wiki (at least it was last time I looked). The dtb is tightly coupled to the kernel version. Using a dtb from the terasic reference SD image will work for kernel version 3.7, but it will not work for kernel 3.9 or above. The reference one created by Altera's sopc2dts tool is crap and won't work either. However, a working dtb has been included in the linux-socfpga tree under arch/arm/boot/dts/socfpga_cyclone5.dts. This can be compiled to a dtb either through the dtc tool itself, or in-situ by running 'make ARCH=arm dtbs'. This is good enough to get started with, but if you add additional memory mapped devices to your system you will have to modify it by hand and recompile it.

NOTE: the socfpga_cyclone5.dts file exists in the 3.9-rel tree, but has been replaced and expanded in master by one specifically tailored towards the SoCKit. I haven't looked at this yet, it's on my todo list. You may wish to check it out.

OTHER NOTE:The bootloader will look for socfpga.dtb by default. You can change the name of the file that it looks for by tweaking the bootloader environment settings (this is good practice) or you can change the name of the file when you copy it to the filesystem.

Expand the compiled root file system tarball into a folder called rootfs. You must do this using sudo. It seems like a needless step.

Gather the compiled u-boot.img, zImage, socfpga.dtb, preloader, and rootfs directory together and run the tool to make the SD card image. Write the SD card image to an a SD card, insert, and powerup. Open a serial terminal at 112500 baud (57600 for older versions of u-boot) and watch the boot process. Hit the soft reset key to start the process over.

OTHER OTHER NOTE: This is mentioned in the documentation, but deserves mentioning anyway. If the system is configured to boot via Active Serial 4x it will load the FPGA image from the EPCQ256 which due to a bad default image will prevent the HPS from initializing. Supposedly this can be fixed by overwriting the EPCQ256, but the best way is to actually program the FPGA from a file stored on the SD card. This can be done through u-boot directly but I haven't figured out how yet (yay documentation...)

That should be enough to get you started. If you see no output or it hangs before u-boot has loaded, then the preloader is incorrectly packaged or misconfigured. Make sure that you didn't skip any steps in the tutorial.

If you get to the u-boot command prompt (interrupt the autoload) then your preloader is fine.

The next step is to load the kernel. just type 'bootz' (or let it autoboot) and watch the magic. If it says "Bad zImage Magic!" then there the dtb file is not correctly compiled. If it loads but hangs before running init then the dtb is compiled but not compatible with the kernel. Attempting to use a 3.7 dtb with the 3.9 kernel will at the very least result in the MMC failing to respond. u-boot can read it, and can thus load the kernel into memory, but the kernel itself cannot read it.

I hope that this helped a bit!

Re:ZedBoard, SoCKIT (1)

volvox_voxel (2752469) | about 9 months ago | (#45705455)

Great. Thank you for taking the time to write all this for us. -Joe

Re:ZedBoard, SoCKIT (0)

Anonymous Coward | about 9 months ago | (#45705781)

I have also been struggling with the incredibly lacking documentation for the SoCkit. I would like to suggest though that you check out the mailing list at rocketboards.org--specifically, the RFI (request for info) list. The archive has an absolute ton of info that is not present on their wikis, and the list itself is very responsive and I've had many questions answered within hours.

Re:ZedBoard, SoCKIT (1)

Pinhedd (1661735) | about 9 months ago | (#45707847)

Yeah that's where I found many answers to my questions. There's no easy way to look through it and few if any solutions are catalogued or included in the wiki. Sometime over the Christmas holidays I will write a more comprehensive guide.

Re:ZedBoard, SoCKIT (0)

Anonymous Coward | about 8 months ago | (#45711245)

This is the most informative post of the year. And it comes from actual experience.

Re:ZedBoard, SoCKIT (2)

Ditiris (689306) | about 9 months ago | (#45703447)

I'm curious as to what aspect of Altera's offering you find more powerful than Xilinx? The SocKIT is $1600, although they're practically giving them away if you attend the training ($100 I think for the training and the kit). The MicroZed is $200, the Zed $400. Sure, it's a smaller logic density device, but it works for proof-of-concept. I also like the inclusion of the many PMod adapters on the Zed board as opposed to the SoCKIT.

In general I find the devices are roughly equivalent. I would probably give the advantage to Xilinx for including the on-chip-memory on the processor subsystem side. I haven't looked at Altera as much, since they weren't ready in time for our application. I will say that I am extremely impressed by the Artix and Kintex fabrics. My impression was that Altera made a major mis-step at this node.

In my opinion, any of the above boards is a significantly better choice than an LX9.

Re:ZedBoard, SoCKIT (0)

Anonymous Coward | about 9 months ago | (#45705521)

The SocKit is currently $299 on the Terasic and Arrow sites.

Re:ZedBoard, SoCKIT (1)

Pinhedd (1661735) | about 9 months ago | (#45706753)

Altera's reference Cyclone V SX Series development kit is $1600. This includes the subscription edition of Altera's SoCEDS suite which allows for bare metal debugging over JTAG.

The SoCKit is only $300. The hardware is (nearly) identical and it is designed to be compatible with Altera's reference design at both the harware and software level. It does not come with the subscription edition of Altera's SoCEDS so users are limited to either the 30 day trial or a free licence which supports only gdb over IP for application debugging (thus restricting it to linux only).

I love the PMOD connectors on the Zed. I purchased the analog essentials kit from Maxim to play around with. The documentation and reference designs are pretty good.

The on-chip memory on the Xilinx HPS is larger (256KiB) than Altera's (64KiB) but the Altera Cyclone V S and Arria V S chips have hard memory controllers on both the HPS and FPGA side (1 on the Cyclone V FPGA, 3 on the Arria V FPGA). This is why the ZedBoard has only 512MiB of DDR3 attached to only the HPS, while the SoCKit has 2GiB of DDR3 with 1GiB attached to each of the HPS and FPGA. This allows for 2x to 4x the DDR3 bandwidth with only marginal cost in soft logic.

Both chips use AXI bridges to connect the HPS and the FPGA together, but it seems like there are some minor differences in the way that they are configured; I haven't done enough work on this aspect yet though to make a judgement call.

I'm not at all trashing the Zynq chips. Xilinx and Altera are both terrific companies.

Re:ZedBoard, SoCKIT (0)

Anonymous Coward | about 9 months ago | (#45701727)

Not that ZedBoard...
It is not a very good board for its price...
http://zedboard.org/content/1v-power-supply-under-powered
http://www.zedboard.org/content/burnt-fpga
http://www.zedboard.org/content/rev-d-zedboard-schematicbom-posted
If you read the ZedBoard forums you can see that there are lots of questions - without answers. The community is not that great.

Re:ZedBoard, SoCKIT (0)

Anonymous Coward | about 9 months ago | (#45701729)

Also check out BugBlat http://www.bugblat.com/products/pif/index.html They already have a FPGA board for Raspberry Pi.

bitcoin mining ? (1)

Anonymous Coward | about 9 months ago | (#45701601)

No, seriously ? Does anybody actually mine bitcoins with a Spartan6 with just 9K cells ? and not just as a proof of concept ?

Re:bitcoin mining ? (2)

burisch_research (1095299) | about 9 months ago | (#45701929)

I would think not. Bitcoin mining isn't cost-effective on FPGAs any more.

Re:bitcoin mining ? (1)

jandrese (485) | about 9 months ago | (#45704961)

Not even at $1000?

Depends what you want the FPGA to do... (2)

willy_me (212994) | about 9 months ago | (#45701633)

If you already have a ARM processor, the FPGA will likely be used for real-time interfacing with the outside world - for example, many robotic applications. If this is the situation you are in then it might be worth looking at the Lattice iCE40 line of FPGA. They're small, cheap, use almost no power, and are programmed via SPI. The high-end versions have around 7500 LUTs so they are reasonably powerful.

There are some very inexpensive iCE40 developer boards on the Lattice website - between $25 and $40 (I believe). Makes for an inexpensive introduction to programmable logic. Just do not expect them to be as large and powerful as other FPGAs on the market. They were designed to compliment a CPU by interfacing and filtering sensor data thereby allowing the CPU to remain asleep for as long as possible. Most other FPGAs were designed to implement CPUs...

Re:Depends what you want the FPGA to do... (1)

Anonymous Coward | about 9 months ago | (#45705757)

Lattice MachXO family can run the MICO32 cpu right inside the FPGA. You can get a PICO board [latticesemi.com] for about $40, so it's on the same line of price. There are others [artekit.eu] with more features under 100 EUR, but may not worth it if you are running your firsts FPGA experiments.

The MachX03 looks very promising, but there are not boards to play with...

Some RAM would have been nice (1)

Animats (122034) | about 9 months ago | (#45701779)

That part will interface to external RAM, but they don't include any or connectors for it, so all you get is 576K. The Litecoin miners will be disappointed.

The Raspberry Pi has a connector layout problem, with connectors on three edges. Then these guys stack another board on top, with connectors on three different edges. They have header connectors hanging over the edge on one side, preventing a panel connection to the USB port. Then, I think, you can stack Arduno shields on top. The result is the electronics equivalent of the sillier Swiss army knife models with 50 tools.

They might have been better off making a single board with the FPGA and an ARM SOIC, along with some RAM, rather than stacking boards. It could still be Raspberry Pi software compatible, but mechanically simpler than a board stack. Like this. [knjn.com]

Re:Some RAM would have been nice (2)

hamster_nz (656572) | about 9 months ago | (#45701803)

It does in fact have 64Mb or SDRAM (8MB). I wrote a SDRAM controller [hamsterworks.co.nz] for it, that also works on the Papilio Pro...

Re:Some RAM would have been nice (0)

Anonymous Coward | about 9 months ago | (#45701985)

Ah... I have to thank you, by the way. I used some of your code to access the memory on the DE0-nano last year, and while I can't say it went entirely without hitch I did get it working in the end. :)

Re:Some RAM would have been nice (1)

hamster_nz (656572) | about 8 months ago | (#45742125)

Would you like to send anything back for me to put up on the site?

Lack of a SDRAM controller was why I sold off my DE0-nano...

Re:Some RAM would have been nice (0)

Anonymous Coward | about 9 months ago | (#45701953)

That part will interface to external RAM, but they don't include any or connectors for it, so all you get is 576K. The Litecoin miners will be disappointed.

They'll be disappointed anyway. Boards like this tend to have very slow external memory compared to what you get on a typical CPU or GPU in any case. If you want to FPGA mine Litecoin, you'll need a board that's custom designed for memory bandwidth, and they are usually very expensive. Or an FPGA with enough onboard memory.

I'd want one... (0)

Anonymous Coward | about 9 months ago | (#45701847)

But according to that "question mark in the headline"-theory, the answer is no, and apparently I don't want one :(

Meh (1)

Anonymous Coward | about 9 months ago | (#45701935)

Assuming the $69 reward level is the price they intend shipping them at, I'd much rather spend the extra $10 to get a DE0-nano: twice the number of logic elements in the FPGA, and much more importantly *more LEDs*! :)

BBB (1)

dohzer (867770) | about 9 months ago | (#45701945)

Can I get one for my BeagleBone Black instead?

Re:BBB (3, Interesting)

jpiat (3465057) | about 9 months ago | (#45704079)

The LOGI-bone is compatible with beaglebone and beaglebone-black. On the Beaglebone-black it will de-activate the eMMC because the lines are shared with the GPMC.

In other words... (1)

Anonymous Coward | about 9 months ago | (#45702481)

They've invented (or rather promised to invent) a solution to a problem that doesn't exist. You can already grab any number of FPGA dev boards today and interface them with your RPi or BBB for less than $100. Making another one from scratch isn't going to 1) Teach coders to be logic designers 2) Make it easier to learn the FPGA toolchain 3) Enable anybody to do something they couldn't just as easily and affordably do before. Yay crowd-funding.

posting to undo mod (1)

necro81 (917438) | about 9 months ago | (#45702663)

[no body]

Do not buy this (3, Informative)

Ditiris (689306) | about 9 months ago | (#45703641)

Short version: I write FPGA code for a living: don't buy this kit. Get a Xilinx MicroZed, Zed, or Altera SoCKIT. It is a revolutionary improvement over what is offered in this kickstarter at a similar price point.

Long version: If you're interested in HDL and coming from the processor world (ARM), consider the Xilinx Zed, MicroZed, or Altera SoCKIT. The Zed is $400 (slightly less with an academic discount), the MicroZed $200, and I believe you can get an Altera SoCKIT board for $100 if you attend the training (if not, it's expensive at $1600). For a hobbyist, I would probably choose the MicroZed since it's the cheapest to buy straight-out at $200, or Zed if you wanted some of the PMod peripherals.

Any of the above boards offer significant advantages over the LOGi FPGA. The Spartan 6 LX9 is disappointing as a choice, as it's a very small, last-generation device. The current SoC offerings from both Altera and Xilinx pair a processor subsystem (PS) (dual Cortex A9) with a programmable logic (PL) subsystem via an array of standard ARM interfaces (AXI). I believe all of the Xilinx/Altera offerings have between 2,000 and 3,000 built-in connections between the PS and PL. This is a tremendous advantage and offers ridiculous amounts of bandwidth between the PS and PL. It allows unprecedented cooperation between the PL and PS that leads to significantly better performance than is possible with a discrete processor and FPGA combination.

Re:Do not buy this (3, Informative)

jpiat (3465057) | about 9 months ago | (#45704035)

Hi, i think that you don't see the point of our product. The LOGI don't pretend to be the most powerful most versatile product on earth. We just propose a board to learn co-design with simple starting point. If you give a zedboard or a sockit to a beginner its just like throwing him a brick in the face. What the beaglebone and raspberry-pi propose is a system of capes/extension boards that you can had as you progress or to match your needs. With these two platform you benefit from a much wider community support that the zeboard/sockit and much better support from a wide community of beginners and expert (when zedboard sockit are just expert platforms). Moreover the price you show are for Xilinx/Altera subsidized platforms, if you have a look at open-hardware platforms, our price-point is no higher.

Re:Do not buy this (2)

mako1138 (837520) | about 9 months ago | (#45705679)

I'm going to have to disagree with you. If somebody already has a RPi or BB, then this board makes a whole lot of sense: it just stacks on top of your existing unit, both physically and logically. In Zynqland it'd take quite some effort to construct the abstraction layers that they seem to be building into this project; you have to do things like rebuild the FSBL and binfile and it gets to be a pain. There's a community of sorts but it's small peanuts compared to the RPi juggernaut.

I agree that the bandwidth between the PS/PL is really awesome and blows away the separate-chip solution. But lets get real: beginners don't need that kind of performance. It's better for them to have something that's encapsulated and somewhat friendly-fied so they can get their feet wet, rather than drowning them in arcana right out the gate.

I also don't think the MicroZed is a good idea for hobbyists, unless playing with Linux is all you're after. Most of the IO is on the high-density Bergstak connectors, which means that you either buy the official (limited) carrier board, or roll your own custom carrier. And since the main attraction of SoC/FPGAs like this is fast I/O and tight coupling, unless you're doing something relatively high-performance and willing to spend money on the requisite hardware development, it doesn't make sense to adopt this platform. I see MicroZed as a vehicle to speed up project development; not so ideal for the hobbyist.

Re:Do not buy this (0)

Anonymous Coward | about 8 months ago | (#45711679)

The current SoC offerings from both Altera and Xilinx pair a processor subsystem (PS) (dual Cortex A9) with a programmable logic (PL) subsystem via an array of standard ARM interfaces (AXI). I believe all of the Xilinx/Altera offerings have between 2,000 and 3,000 built-in connections between the PS and PL.

That sounds very interesting, and a much easier way of doing something I've been working on for a while. Do you happen to know typical unit pricing for <100 units at low end of the specification scale? Are there any low-cost embeddable modules using these, or would I need an entirely custom board layout?

MicroZED (1)

Anonymous Coward | about 9 months ago | (#45703815)

If you want a smaller form factor than the ZED board, there is MicroZED [zedboard.org] .

Be advised that working with Xilinx tools, be it ISE/Planahead or Vivado, redefines frustration to a whole new level. While the actual Zynq hardware is decent, the development tools are a bl*ed s*g p*e of s*t full of bugs and undocumented 'gotchas' that chews for hours before throwing up a diarrhea of incomprehensible error messages and/or generate an unworkable result.

Xilinx support is laughable, you will at best find very cryptic hinglish that may or may not be related to your problem but certainly does not do the needful.

Make sure to charge by the hour when contracting, or when you're in the other seat, take out a big liability insurance against workers going postal or suing you for mental abuse.

Re:MicroZED (1)

ballpoint (192660) | about 9 months ago | (#45705785)

If you want a smaller form factor than the ZED board, there is MicroZED [zedboard.org] .

Be advised that working with Xilinx tools, be it ISE/Planahead or Vivado, redefines frustration to a whole new level. While the actual Zynq hardware is decent, the development tools are a bl*ed s*g p*e of s*t full of bugs and undocumented 'gotchas' that chews for hours before throwing up a diarrhea of incomprehensible error messages and/or generate an unworkable result.

Xilinx support is laughable, you will at best find very cryptic hinglish that may or may not be related to your problem but certainly does not do the needful.

Make sure to charge by the hour when contracting, or when you're in the other seat, take out a big liability insurance against workers going postal or suing you for mental abuse.

Crassly stated, but there's a ring to it.

The creators point of view (3, Informative)

Anonymous Coward | about 9 months ago | (#45703825)

Hi all,

i'am one of the co-founder of the project and i just want to address some of your questions/remarks:

Why buying a LOGI-board when you can get a zedboard/sockit ?

The zeboard/sockit are much more powerful than what the LOGI boards can propose and they will run much higher performance applications ... but they lack support from the software community, and are definitely a no go for a beginner. The Beaglebone and Raspberry-pi benefits of a great support from the software community and kernel development community, with our board we try to bridge a gap between the hardware and software community using the beaglebone/raspberry-pi + LOGI as a collaborative platform for the two. Give a kid a zedboard and raspberry-pi and guess which one he will throw to the bin in the end. The idea of stacking boards is to follow the progress of the user and had complexity when its time to.

Why getting a LOGI-board when you can get a DE0/MicroBoard for the same price ?

The computng power of the raspberry/beaglebone processor is far better than what you can get with a NIOS/Blaze and the linux support is great. Moreover you can program the logic from the processor (i did not say design the logic) while a Blaze can't. With the Linux of these boards, you also have access to a ton of software repositories. The LOGI-boards are designed with co-design in mind, when you use Blaze/NIOS you targets both ends of the co-design problem at the same time. With the LOGI-boards you can separate the concerns.
The price problem is also difficult, DE0 and MicroBoards are subsidized by the chip vendors (Altera/Xilinx) so they can be sold for cheap. We are not subsidized so the price you pay is closer to the price you would pay to build your own product.

Thanks for all your comments, and don't hesitate to ask for more information.

Jonathan Piat

Re:The creators point of view (1)

Anonymous Coward | about 8 months ago | (#45711591)

Why getting a LOGI-board when you can get a DE0/MicroBoard for the same price ?

The computng power of the raspberry/beaglebone processor is far better than what you can get with a NIOS/Blaze and the linux support is great. Moreover you can program the logic from the processor (i did not say design the logic) while a Blaze can't. With the Linux of these boards, you also have access to a ton of software repositories. The LOGI-boards are designed with co-design in mind, when you use Blaze/NIOS you targets both ends of the co-design problem at the same time. With the LOGI-boards you can separate the concerns.

But hooking the DE0 up to a RPi (or any other SBC) is trivial with a bit of ribbon cable, and if I use a USB cable as well I can also program the FPGA from it like with your system. It provides a more powerful solution at (I think, if I understand your pricing correctly) a lower price than your solution. So why wouldn't anyone want to do it that way?

Yes, your system provides a neater packaging option, but this is unlikely to be an issue for the kind of hobbyist applications hardware like this targets. Also, there are other options that enable neat solutions with standalone boards -- earlier this year I worked on a project that used an Olimex SBC and a DE0-nano which I tied together by producing a motherboard for both boards out of a bit of stripboard and some pin-header sockets. I was also able to put some custom electronics I needed (a buffer chip to drive off-board hardware) onto the motherboard. This worked really well, is within the reach of most hobbyists, and I don't see what advantage (if any) your board offers over this kind of approach.

toolchain? (1)

convolvatron (176505) | about 9 months ago | (#45704579)

given xilinx's history in the past, whats the toolchain situation?

in the past i've had to deal with license servers, multi-thousand dollar licenses, being locked into windows,
having to reverse engineer internal formats because the tools wouldn't work for me, having day-long
synthesis/test cycles because their routing was so abysmal, etc

admittedly I'm an old fuck, so thing may have changed

i scanned the page, but they dont seem to say a single thing about tools.

  what the situation?

Re:toolchain? (3, Interesting)

jpiat (3465057) | about 9 months ago | (#45704645)

Hi, the Xilinx Web edition toolchain (free of charge) supports the spartan6 LX9. Synthesis time is a bit longer than when you own an "expensive" license but the LX9 is a small FPGA so you'll never wait too long to get the synthesis done. Regards, Jonathan Piat LOGI-team

Re:toolchain? (1)

ballpoint (192660) | about 9 months ago | (#45705767)

given xilinx's history in the past, whats the toolchain situation?

in the past i've had to deal with license servers, multi-thousand dollar licenses, being locked into windows,
having to reverse engineer internal formats because the tools wouldn't work for me, having day-long
synthesis/test cycles because their routing was so abysmal, etc

admittedly I'm an old fuck, so thing may have changed

i scanned the page, but they dont seem to say a single thing about tools.

  what the situation?

No that much has changed. The good is that there are free Webpack editions for certain chips. The overwhelming bad is that the long cycles and the unexplainable bugs are still there. It's easy to lose 50K$ on needlessly wasted engineering time over the course of a single project.

Re:toolchain? (1)

mako1138 (837520) | about 9 months ago | (#45705879)

>in the past i've had to deal with license servers, multi-thousand dollar licenses,
I've never had a problem with the Webpack edition not activating.

>being locked into windows
Apparently most serious folks run the tools on Linux these days. Works fine on RH.

>having to reverse engineer internal formats because the tools wouldn't work for me
Hasn't happened to me, knock on wood. Hopefully they've worked out more corner cases since your time.

>having day-long synthesis/test cycles because their routing was so abysmal, etc
I think this is a given once you get above x% utilization. Newer FPGAs have more interconnect, though.

By keeping it Spartan (heh) they at least avoid the stupidity in the Zynq tools. What good is a "critical warning" [xilinx.com] that you're supposed to ignore, Xilinx?

Parallela board (1)

4wdloop (1031398) | about 9 months ago | (#45704837)

Another choice - Zynq + transputter @ $100
http://www.parallella.org/ [parallella.org]

Re:Parallela board (2)

jpiat (3465057) | about 9 months ago | (#45704909)

Not sure its a good idea when you want to get into the game of co-design : dula core CPU + ManyCore + FPGA ... lets learn things one step at a time if you don't want to end up with nice piece of equipment taking dust in your drawer.

A couple of points to address (2)

valentfx (3465149) | about 9 months ago | (#45705689)

I would just like to quickly address a couple of these points that have come up in the previous posts: I would first acknowledge and concede that the current LOGi-Board offerings are not the latest, fastest, sexiest, FPGA boards on the market. There are a great deal of offerings and all having their respective strong points. The LOGi-Boards do not attest to competing with the latest SOC offerings with quad-core ARM A9 processors on-chip. The LOGi-Boards reveal themselves to the world in a humble Sparatan 6 TQFP manner. But, because LOGi is not fastest sprinter on the field, we believe that they have their place, right at the easy to use entry point to using FPGA with ARM. The current LOGi-Board offerings are our entry level with what we found to be the most cost effective per performance entry into the market. With the success of the current offering we hope to begin addressing the Camaro, high horse power offerings in the future! The point of the LOGi boards is to eliminate the time consuming, error prone procedure of creating a discrete, “perf” board, or other unreliable interface to the ARM platform. How long will this process take, what are the chances of getting the connections wrong, how well will it hold together if you decide you want to use in a project for long term usage. Do you have drivers to and API to quickly interface between the FPGA and CPU? If not do you have the skills to write your own interface drivers or API? How long will this take and how many hairs will you lose in trying to make things work? Based on on a previous post of a presumed experience HDL/Embedded user on this thread this is what you might expect “I've spent the better part of the past 3 weeks just figuring everything out on my own.” (See Re:ZedBoard, SoCKIT thread). 1) “Teach coders to be logic designers”. We make no such assertion of making coders logic designers, rather wish make FPGA’s reasonably accessible and workable from a coders perspective. I believe there is a vast contrast between being a “coder” and “logic designer” and we simply want to allow the coder to understand and be able to work with the grass on the other side of the fence. For those do not wish to learn HDL or deal with any “logic design”, we make a usable product for them as well with the LOGi-Apps. Simply download the latest pre-configured application and have it running with any of the above mentioned issues. 2) “Make it easier to learn the FPGA toolchain”. I am not sure where we made the claim of making it easier, but we do eliminate the need to use the toolchain completely if the user wishes. See previously mentioned LOGi-Apps. We do supply all of the existing wrappers and interfaces to make HDL development with said toolchain’s a greatly expedited procedure though. 3) “Enable anybody to do something they couldn't just as easily and affordably do before”. Our current offering may not be perfect, but have hope and goals of making things a little easier for those who may not have been very welcomed to the wide world of FPGA previously. If we are not there yet, well, I would say we are just getting started and will be there shortly! Happy FPGA/CPU to all!

Re:A couple of points to address (0)

Anonymous Coward | about 9 months ago | (#45706299)

Nice work getting things transitioned with the Mark 1!

-Eli

Sata Port + Pi ! (1)

Dan Askme (2895283) | about 9 months ago | (#45706169)

My pi has been sitting around, doing its business on the home network for over a year.
Any chance of getting a Sata port for my Pi would be a worthwhile investment. Add to that a FPGA chip which would allow me to "play" with mining bit/lite coins, is good enough for me.

Great idea for Pi owners who are new to FPGA (eg: me), and, want to try it out on a platform which they are comfortable with.

Re:Sata Port + Pi ! (2)

jpiat (3465057) | about 9 months ago | (#45707403)

Hi, don't be misleaded by the SATA port on the LOGI-pi, its just a connector for LVDS signals, but we don't have an IP (in the FPGA) that is capable of handling a SATA disk. Someone may work on this at some point, but the SPI bandwidth with the FPGA is limited to 3.8MB/s (rather slow for a SATA disk ...). Regards, Jonathan Piat LOGI-team

simplest of all... (1)

Anonymous Coward | about 8 months ago | (#45714165)

If you want to learn FPGA why not look at the Xula by Xess?
Open-source design
XC3S200A 200,000 gate FPGA
8 MByte SDRAM
2 Mbit Flash
3.3 & 1.2V regulators
40-pin interface
PIC 18F14K50 micro
USB 2.0 port

all for $55.

Check for New Comments
Slashdot Login

Need an Account?

Forgot your password?

Submission Text Formatting Tips

We support a small subset of HTML, namely these tags:

  • b
  • i
  • p
  • br
  • a
  • ol
  • ul
  • li
  • dl
  • dt
  • dd
  • em
  • strong
  • tt
  • blockquote
  • div
  • quote
  • ecode

"ecode" can be used for code snippets, for example:

<ecode>    while(1) { do_something(); } </ecode>