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Processors and the Limits of Physics

Soulskill posted about 4 months ago | from the i-miss-the-turbo-button dept.

Hardware 168

An anonymous reader writes: As our CPU cores have packed more and more transistors into increasingly tiny spaces, we've run into problems with power, heat, and diminishing returns. Chip manufacturers have been working around these problems, but at some point, we're going to run into hard physical limits that we can't sidestep. Igor Markov from the University of Michigan has published a paper in Nature (abstract) laying out the limits we'll soon have to face. "Markov focuses on two issues he sees as the largest limits: energy and communication. The power consumption issue comes from the fact that the amount of energy used by existing circuit technology does not shrink in a way that's proportional to their shrinking physical dimensions. The primary result of this issue has been that lots of effort has been put into making sure that parts of the chip get shut down when they're not in use. But at the rate this is happening, the majority of a chip will have to be kept inactive at any given time, creating what Markov terms 'dark silicon.' Power use is proportional to the chip's operating voltage, and transistors simply cannot operate below a 200 milli-Volt level. ... The energy use issue is related to communication, in that most of the physical volume of a chip, and most of its energy consumption, is spent getting different areas to communicate with each other or with the rest of the computer. Here, we really are pushing physical limits. Even if signals in the chip were moving at the speed of light, a chip running above 5GHz wouldn't be able to transmit information from one side of the chip to the other."

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There are no limits! (1)

Anonymous Coward | about 4 months ago | (#47684579)

Well, except that every other technology has hit limits, except computers! They'll just endlessly get better. Forever.

Re:There are no limits! (-1)

Anonymous Coward | about 4 months ago | (#47684649)

Actually, it is very good that computers (well, CPUs) have limits. We're unlikely to face the AI threat that the great visionary Musk shat his pants about the other day.

Re:There are no limits! (2)

AchilleTalon (540925) | about 4 months ago | (#47684755)

Your reasoning is false. Most AI algorithms are having a high level of parallelism which make them less susceptible to the single CPU physical limit. You can achieve incredible performance improvement on GPU and other parallel architectures.

Re:There are no limits! (1, Insightful)

blue trane (110704) | about 4 months ago | (#47684731)

Yes, like Simon Newcomb [wikipedia.org] proved we had hit limits in heavier-than-air flight, in 1903!

In the October 22, 1903, issue of The Independent, Newcomb made the well-known remark that "May not our mechanicians . . . be ultimately forced to admit that aerial flight is one of the great class of problems with which man can never cope, and give up all attempts to grapple with it?"

Re:There are no limits! (0)

Anonymous Coward | about 4 months ago | (#47684875)

But all it took was two bicycle mechanics in a garage to put a home-made engine on a kite to prove otherwise.

Today it takes billion dollar multinational collaboration among post-doctoral scientists just to get the next nudge out of our technologies.

But to you, it's exactly the same situation and we'll just find smaller atoms or new elements in the periodic table, right?

Lightfoot (0)

Anonymous Coward | about 4 months ago | (#47684585)

The speed of light is about a foot per nanosecond, so at 5 GHz wouldn't that set a limit of about a fifth of a foot? Pretty big for a chip.

Re: Lightfoot (4, Informative)

Fred Zlotnick (3676845) | about 4 months ago | (#47684967)

The speed of light is approximately .3 X 10^8 m. Per sec in a vacuum. It's about half as fast in a semiconductor like silicon. So closer to 6 inches. Nearly all chips are less than one inch. Even if this were not the case, that would not be an upper limit, data does not have to reach the end of the chip before the next clock cycle. This is an example of the author having a bit of knowledge ( erroneous, as you point out) and extrapolating an incorrect answer.

Re: Lightfoot (1)

TechyImmigrant (175943) | about 4 months ago | (#47685291)

Right. There's no way you'd run a signal across a one inch chip and expect to get anything useful out the other end.

In days of yore, the signal would be buffered a few times.

These days it would pass through 5 clock domains and power boundaries and so have to be rebuffered, resynchronized, levelshifted and firewalled at each stage. But this is normal and we do it all the time.

Re: Lightfoot (1)

Anonymous Coward | about 4 months ago | (#47685927)

The speed of light in a vacuum is about 3.0 x 10^8 m/sec, not 0.3 x 10^8 m/sec. Still, your 6" per nanosec at half the speed of light in a vacuum is about right.

Re: Lightfoot (0)

Anonymous Coward | about 4 months ago | (#47686077)

The speed of light is approximately .3 X 10^8 m. Per sec in a vacuum. It's about half as fast in a semiconductor like silicon. So closer to 6 inches. Nearly all chips are less than one inch. Even if this were not the case, that would not be an upper limit, data does not have to reach the end of the chip before the next clock cycle. This is an example of the author having a bit of knowledge ( erroneous, as you point out) and extrapolating an incorrect answer.

Speed of light is ~3e5 m/s. You're off by two orders of decimal magnitude.

Re: Lightfoot (0)

Anonymous Coward | about 4 months ago | (#47686093)

Bah, sorry, droped a K. You're off by a single order of decimal magnitude.

Re: Lightfoot (1)

K. S. Kyosuke (729550) | about 4 months ago | (#47686141)

Local (narrow) interconnects are several times slower than that, though. You need wide ones across longer distances. And I'm not really sure the whole thing with routing an impulse from place A to place B is that simple anymore.

Re:Lightfoot (1)

HiThere (15173) | about 4 months ago | (#47685629)

There is also the assumption that the chip structure is 2-D. This is already not totally true, though there are tremendous heat problems as you start stacking layers. This is one of the attractions of "spintronics"...state can be switched with less heat.

Rerun (-1)

Anonymous Coward | about 4 months ago | (#47684589)

Slow news day?

This seems like a good time to meniton these (5, Interesting)

Jody Bruchon (3404363) | about 4 months ago | (#47684595)

Clockless logic circuits [wikipedia.org] might be an interesting workaround for the communication problem. The other side of the chip starts working when the data CAN make it over there, for example. I don't claim to know much about CPU design beyond how the work on a basic logical level, but I'd love to hear the opinions of someone here who does regarding CPUs and asynchronous logic.

Re:This seems like a good time to meniton these (1)

K. S. Kyosuke (729550) | about 4 months ago | (#47684635)

Chuck Moore does these. Of course, they're extremely simple at the moment (comparatively speaking). But they are indeed extremely energy efficient, and the self-timing thingy works great for them.

Re:This seems like a good time to meniton these (1)

TechyImmigrant (175943) | about 4 months ago | (#47685357)

How are they energy efficient?

More gates == more static power draw.
Leaving a circuit switched on because you don't know when asynchronous transitions will arrive == more static power draw.

Global async design may have made sense in 1992, but not these days. Silicon has moved on.

Re:This seems like a good time to meniton these (2)

K. S. Kyosuke (729550) | about 4 months ago | (#47685733)

It depends. This is the same guy that Intel licenses a lot of power-saving patents from. You'd have to ask him, but the static power draw of his circuits is indeed minimal. Perhaps the reason is that he doesn't use manufacturing processes with high static power draw on purpose, I really don't know. It may also be the case that a switch from contemporary silicon to something else in the future will make this design more relevant again, power-wise (but the timing considerations, as well as the speed of light, are of course going to stay the same).

Re:This seems like a good time to meniton these (0)

Anonymous Coward | about 4 months ago | (#47684983)

The implications for timing based side channels seems like a big concern. These days a lot of work is done to make crypto operations take the same cycle count regardless of data, but this seems unfeasible in asynchronous CPUs. Ex: even basic math like add and multiply may end up running faster for some inputs.

Re:This seems like a good time to meniton these (0)

Anonymous Coward | about 4 months ago | (#47685777)

Asynchronous circuits tend to be temperature-dependent, though (even in each part separately), and I can imagine this kind of non-determinism potentially making these side channels much less viable. And specialized crypto units (such as the recent AES ISA extension on x86) could be designed to be more resilient anyway. The same thing goes for computer architecture in general: even with computation-dependent timings, with separate units performing larger blocks of computation independently and communicating via message passing, any timing measurements don't necessarily have to betray enough of the internal state to matter. Can you tell what the HTTP server communicating with yout browser was computing based on the length of the recent round-trips? It sounds like trying to reconstruct the cow from a box of hamburgers to me. (In addition, asynchronous CPUs might make snooping on the computation using EM noise much harder, because the noise is...well, more noisy.)

Re:This seems like a good time to meniton these (1)

sjames (1099) | about 4 months ago | (#47686297)

It's perfectly feasible in an async processor. You just have to hold the results in a buffer at the end of the computation until a timer fires. The timer being set to the longest the op might possibly take.

Async chips can have timers, they're just not driven by them.

Re:This seems like a good time to meniton these (2)

TechyImmigrant (175943) | about 4 months ago | (#47685345)

I guess that's me then.

Every D-flip flop is an async circuit. We use a variety of other standard small async circuits we use that are a little bigger. Receiving clock-in-data signals like DS links is a common example. What you're talking about is async across larger regions.

Scaling fully asynchronous designs to a whole chip is a false economy. The area cost is substantially greater than a synchronous design and with the static power draw of circuits now dominating, the dynamic power savings of asynchronous design is moot. You need to turn circuits off to save power. Just rendering them static doesn't help much.

A modern CPU is made of islands of synchronous design, which are not assumed to be globally synchronous. Data passing between these islands is generally re-synchronized.

An exception is power control signaling. Clock trees are power hogs, so you don't want to have to leave it on to support the power gating interfaces. So an async state machine to communicate power management protocols is common.

Re:This seems like a good time to meniton these (2)

Jody Bruchon (3404363) | about 4 months ago | (#47686225)

More relevant links to asynchronous/clockless computing:
http://www.embedded.com/design... [embedded.com]
http://www.technologyreview.co... [technologyreview.com]
http://www.scientificamerican.... [scientificamerican.com]
http://www.nytimes.com/2001/03... [nytimes.com]

Go vertical! (5, Interesting)

putaro (235078) | about 4 months ago | (#47684603)

Stacking dies or some other form of going from flat to vertical will get you around some of the signaling limits. If you look back at old supercomputer designs there were a lot of neat tricks played with the physical architecture to work around performance problems (for example, having a curved backplane lets you have a shorter bus but more space between boards for cooling). Heat is probably the major problem, but we still haven't gone to active cooling for chips yet (e.g. running cooling tubes through the processor rather than trying to take the heat off the top).

Re:Go vertical! (1)

savuporo (658486) | about 4 months ago | (#47684627)

Ah, Prime Radiant !

Re:Go vertical! (2)

Nemyst (1383049) | about 4 months ago | (#47684861)

This. It won't be easy, of course not, but there's this entire third dimension we're barely even using right now which would give us an entirely new way to scale up. The possible benefits can already be seen in for instance Samsung's new 3D NAND, where they can get similar density to current SSDs with much larger NAND, thus improving reliability while keeping capacities and without significantly increasing costs. Of course, CPUs generate far more heat than SSDs, but the benefits could be tremendous. If anything, imagine the amount of cores you could cram in the same die area if you could stack them!

Re:Go vertical! (0)

Anonymous Coward | about 4 months ago | (#47684883)

Maybe you'd like to find out how chips are made now before saying how we're "barely" using something?

http://www.youtube.com/watch?f... [youtube.com]

Random Title (0)

Anonymous Coward | about 4 months ago | (#47684607)

I'm still waiting for estimates on when graphene will hit the consumer market and the same with optical transfer...
I'm mainly itching for graphene.

Re:Random Title (1)

blue trane (110704) | about 4 months ago | (#47684745)

Didn't you get the memo [slashdot.org] ? Hemp seeds are better than graphene. Plus you can get high while growing the seeds.

Alpha Particles (1)

AlecDalek (3781731) | about 4 months ago | (#47684613)

So why don't we use Alpha radiation particles?

Re:Alpha Particles (1)

wonkey_monkey (2592601) | about 4 months ago | (#47685217)

So how would we use alpha particles?

Re:Alpha Particles (1)

AlecDalek (3781731) | about 4 months ago | (#47686235)

They work just like electrons, but faster. Heat would be an issue though. And radiation, of course.

can't cross chip in one clock. big deal. (5, Interesting)

dbc (135354) | about 4 months ago | (#47684637)

"Even if signals in the chip were moving at the speed of light, a chip running above 5GHz wouldn't be able to transmit information from one side of the chip to the other." ... in a single clock.

So in the 1980's I was a CPU designer working on what I call "walk-in, refrigerated, mainframes". It was mostly 100K-family ECL in those days and compatible ECL gate arrays. Guess what -- it took most of a clock to get to a neighboring card, and certainly took a whole clock to get to another cabinet. So in the future it will take more than one clock to get across a chip. I don't see how that is anything other than a job posting for new college graduates.

That one statement in the article reminds of when I first moved to Silicon Valley. Everybody out here was outrageously proud of themselves because they were solving problems that had been solved in mainframes 20 years earlier. As the saying goes: "All the old timers stole all our best ideas years ago."

Re:can't cross chip in one clock. big deal. (0)

Anonymous Coward | about 4 months ago | (#47684677)

That one statement in the article reminds of when I first moved to Silicon Valley. Everybody out here was outrageously proud of themselves because they were solving problems that had been solved in mainframes 20 years earlier. As the saying goes: "All the old timers stole all our best ideas years ago."

Reminds me of the memory management team for OS/2 back when I was at Boca.

An "old time" mainframe person was there as a contractor (the only one) working on OS/2 and she used to say regarding the memory management, "All of this was solved with MVS. They're reinventing the wheel."

Later on ('95), many many mainframe programmers and developers were canned for having "out of date skills.".

I sometimes think, if IBM had the mainframe people write OS/2 instead of Microsoft, I wonder what would have come of it - technology wise. Sales and marketing would have been still done by the same people.

Re:can't cross chip in one clock. big deal. (3, Informative)

AchilleTalon (540925) | about 4 months ago | (#47684697)

Well, clearly moving mainframe people to OS/2 development wouldn't have been a so great idea. The mainframe segment was much more profitable than the PC segment where the profit margin are so thin IBM decided to sell the whole division to Lenovo. The money is elsewhere.

And do not forget memory management has to be reinvented because there was IP rights on the MVS algorithms IBM wasn't willing to transfer to OS/2. In these old times, the PC market and mid-range market were perceived as a threat by the big mainframe guys at IBM which were still the guys at the top in the hierachy. The technical side is just the lesser part of this problem.

Re:can't cross chip in one clock. big deal. (5, Interesting)

Rockoon (1252108) | about 4 months ago | (#47684693)

Even more obvious is that even todays CPU's dont perform any calculation in a single clock cycle. The distances involved only effects latency, not throughput. The fact that a simple integer addition operation has a latency of 2 or 3 clock cycles doesnt prevent the CPU from executing 3 or more of those additions per clock cycle.

Even AMD's Athon designs did that. Intels latest offerings can be coerced into executing 5 operations per cycle that are each 3 cycle latency, and then thats on a single core with no SIMD.

Its not how quickly the CPU can produce a value.. its how frequently the CPU can retire(*) instructions.

(*) Thats actually a technical term.

Re:can't cross chip in one clock. big deal. (3)

Zero__Kelvin (151819) | about 4 months ago | (#47684777)

I think the informed among us can agree, this whole article combines a special lack of imagination, misunderstanding of physics, and a complete lack of understanding of how computers work, in order to come up with a ridiculous article that sounds like it was written by chicken little :-)

Re:can't cross chip in one clock. big deal. (0)

Anonymous Coward | about 4 months ago | (#47685615)

You are all missing the point. What happens when an electrical signal goes through a magnetic field? There is chance of interference. It is crosstalk that is being referred to, not throughput or latency. If the previous clock cycle's signals is not far enough away then it increases the likelihood of incoming signals being disrupted. Not having the electrical impulses out of the way within one clock cycle breeds instability in a system.

What has happened to slashdot? All this posturing about 'the informed among us can agree' how 'obvious' things are and working on ancient equipment equating to contemporary concerns while completely missing the point. It is all arguing about the color of the bike shed when the bike is missing a sprocket.

Re:can't cross chip in one clock. big deal. (1)

Zero__Kelvin (151819) | about 4 months ago | (#47685633)

No you're missing the point. What happens, for example, when quantum computing makes the transition from bleading edge to mundane? Nobody knows, but it's safe to say that this guy doesn't either. There is plenty of room for improvement even with current methods and understanding of physics, even if one makes the mistake of ruling out parallel advancements.

Re:can't cross chip in one clock. big deal. (0)

Anonymous Coward | about 4 months ago | (#47684791)

Exactly this. Current size chips would not be able to run at their current clock speed without pipelining.

Re:can't cross chip in one clock. big deal. (1)

TechyImmigrant (175943) | about 4 months ago | (#47685387)

> The fact that a simple integer addition operation has a latency of 2 or 3 clock cycles doesnt prevent the CPU from executing 3 or more of those additions per clock cycle.

That's just wrong. It does't take three clock periods to propagate through an adder on today's silicon unless it's a particularly huge adder. It might take several cycles for an add instruction to propagate though a CPU pipeline, but that is completely different.

Re:can't cross chip in one clock. big deal. (0)

Anonymous Coward | about 4 months ago | (#47685477)

(*) Thats actually a technical term.

Thank you for the condescension. I truly value the opinion of those who shower thier precious distain down upon me.

Re:can't cross chip in one clock. big deal. (1)

Mr Z (6791) | about 4 months ago | (#47686423)

Sure, throughput is what matters most for operations you can parallelize. However, as Amdahl's Law cruelly reminds us, there's always parts of the problem that remain serial, and they'll put an upper bound on performance. You can't parallelize the traversal of a linked list, no matter how hard you try. You have to invent new algorithms and programming techniques. (In the specific case of linked lists, there are other options that trade space for efficiency, such as skiplists [wikipedia.org] .)

Gustafson's Law [wikipedia.org] does offer some hope: As we build more capable machines, we'll tackle bigger problems to utilize those machines. That's how we're able to, for example, get wireless data speeds on our cell phones operating on batteries that would make wired modem users of just 10-15 years ago jealous.

But, Gustafson's Law only serves as a counterpoint to Amdahl's Law to the extent that you tackle bigger problems, as opposed to trying to reduce current problems to take less time and energy.

Re:can't cross chip in one clock. big deal. (2)

Splab (574204) | about 4 months ago | (#47684843)

Are you saying electrons were moving slower in the 80's?

Re:can't cross chip in one clock. big deal. (1)

AchilleTalon (540925) | about 4 months ago | (#47685033)

There is no such constant in physics like the speed of the electron. The speed of the electron depends on the medium it is travelling into as well as the force applied to it. That's why the electron's speed is not the same in an old CRT monitor than in the LEP (Large Electron-Positron Collider, the ancestor of the LHC in Geneva).

Re:can't cross chip in one clock. big deal. (1)

Splab (574204) | about 4 months ago | (#47685301)

Erm, well true, but same goes for light, yet we speak about the speed of light as a constant...

The point I was trying to make, obviously, Slashdot of old has gone away, so I guess you need to pencil it out in stone, was that the guy is claiming a clock cycle took ages to propagate through the systems, which tells us he has no idea, what was and is going on in a computer. Now syncing a clock across several huge monolithic machines back then was easy, because a clock cycle was happening almost at a walking pace, going to 5Ghz is a entirely different beast, as you are now dealing with the limits of physics.

Re:can't cross chip in one clock. big deal. (0)

Anonymous Coward | about 4 months ago | (#47685639)

That's because we talk about the speed of light - in a vacuum - which is a constant.

Re:can't cross chip in one clock. big deal. (0)

Anonymous Coward | about 4 months ago | (#47685157)

It's the clock frequency of the processor that's changed. Assume it takes the electron 1 second to get from one side of the chip to the other, also assume the processor is clocked at 1Hz. If you bump the clock up an additional 1Hz to 2Hz it now takes longer than 1 clock cycle for an electron to cross the chip.

Re:can't cross chip in one clock. big deal. (0)

Anonymous Coward | about 4 months ago | (#47685253)

that doesn't mean you can't start executing a new instruction on one side of the chip before the first clock tick propagates all the way to the other side.

in your hypothetical chip you could potentially pump it up to 10 hz and have 10 different instructions running at various sections of the chip.

Re:can't cross chip in one clock. big deal. (0)

Anonymous Coward | about 4 months ago | (#47685299)

Beats me. I'm an IT guy who knows nothing about the finer points of processor design. I was just explaining that electrons still have the same properties they did in 1980

Re:can't cross chip in one clock. big deal. (0)

Anonymous Coward | about 4 months ago | (#47686019)

And that's why the article is BS. This is why chips already have many different clock domains.

Re:can't cross chip in one clock. big deal. (1)

TechyImmigrant (175943) | about 4 months ago | (#47685393)

The speeds of the electrons is immaterial. The speeds of the electric field in the wires is what matters.
The electrons move really slowly.

Re:can't cross chip in one clock. big deal. (0)

Anonymous Coward | about 4 months ago | (#47685013)

"All the old timers stole all our best ideas years ago."
And your comments about the computer business redoing what was already done in the previous generation of 'thing' have been recycled too.
They solved multi-processing on mainframes. 20 years goes by. They solved multi-processing on pc's. 20 years goes by. They solved multi-processing on tablets and phones. Oh, and in case you are wondering, the next new thing in 20 years will be something like the Google wearables, and 20 years after that, stuff implanted into people. Don't ask me about 20 years after that.

Reminds me of Lord Kelvin... (0)

Petr Kočmíd (3424257) | about 4 months ago | (#47684651)

"Impossible" is just a state of individual mind, not an objective property of anything. Anyone still believes the machines havier than air cannot fly, just because some authority said so?

Re:Reminds me of Lord Kelvin... (0)

Anonymous Coward | about 4 months ago | (#47684865)

Yes. It's just a state of mind when someone asserts it is impossible for these two natural numbers added together, 1 + 1, to ever have a different result. Or that it is impossible for TRUE AND NOT TRUE will to evaluate to a different result.

Nope, there are no objective properties there. It's all relative.

Re:Reminds me of Lord Kelvin... (0)

kwbauer (1677400) | about 4 months ago | (#47684989)

Well, Peter might be a good liberal leftie, everything is relative in that mindset.

Re:Reminds me of Lord Kelvin... (-1)

Anonymous Coward | about 4 months ago | (#47685079)

As Einstein showed, yes things are relative. But to a good thick-skulled repug, everyhthing is absolute which is why you follow the Bible literally, right? (Ah hah haa get it? right?)

Re:Reminds me of Lord Kelvin... (1)

wonkey_monkey (2592601) | about 4 months ago | (#47685231)

As Einstein showed, yes things are relative.

"Things," eh? Any particular "things"?

He also showed that one particular thing was absolute, if you recall.

Re:Reminds me of Lord Kelvin... (1)

ultranova (717540) | about 4 months ago | (#47686315)

He also showed that one particular thing was absolute, if you recall.

Nope. Einstein showed consequences of the speed of light being a constant of nature. He didn't show or even predict that it was one, that was done by Maxwell's equations and various attempts to measure Earth's velocity relative to luminous aether (which turned out to be "zero").

And as it happens, one of those consequences is that timewise and spacewise distance are relative.

Re:Reminds me of Lord Kelvin... (0)

Anonymous Coward | about 4 months ago | (#47685155)

And just because someone was wrong once, it means anything is possible, right? Stupid!

Re:Reminds me of Lord Kelvin... (0)

Anonymous Coward | about 4 months ago | (#47685273)

"We'll colonize space" and "technology progresses forever" are also just a state of mind, not an objective property of anything.

Oh but I guess you believe the universe owes you continuous progress and energy.

I see.

what diminishing returns? (2)

edxwelch (600979) | about 4 months ago | (#47684657)

Each semiconductor node shrink is faster and more power effiecient than the previous. For instance, TSMC 20nm process is 30% higher speed, or 25% less power than 28nm. Likewise, 16nm will provide 60% power saving than 20nm.

Re:what diminishing returns? (1)

phantomfive (622387) | about 4 months ago | (#47684893)

The summary is so confused, the only explanation I can think of is that it doesn't reflect what is in the article. Which is behind a paywall, so I won't be reading it any time soon.

Re:what diminishing returns? (1)

Anonymous Coward | about 4 months ago | (#47684963)

Something called leakage grows as process size goes down.
For 40nm, leakage was around 1 to 4% depending on the process variant chosen.
For 28nm, is jumped to 5 to 10%.
For 20nm, it is around 20 to 25%. This means that just turning a circuit on and doing nothing (0 Mhz) adds to the power consumption.

Re:what diminishing returns? (1)

TechyImmigrant (175943) | about 4 months ago | (#47685411)

If you have a crappy old planar process maybe.

Re:what diminishing returns? (1)

edxwelch (600979) | about 4 months ago | (#47685631)

Not really, because the tech is improving all the time. At 20nm the have high-k metal gates and at 16nm FinFETs.

Limits of physics (-1)

Anonymous Coward | about 4 months ago | (#47684659)

When the Republicans take control of the Senate in november, they can repeal the Laws of Physics, allowing an unlimited expansion of technology.

Re:Limits of physics (-1)

Anonymous Coward | about 4 months ago | (#47684879)

President Romney agrees with you too. Sorry, I forgot he lost, unless they can stop people from voting, Cons are going to have a hard time taking the Senate. They can try to pass a repeal for the Laws of Physics like they have done with ACA, right?

Re:Limits of physics (1)

phantomfive (622387) | about 4 months ago | (#47684911)

President Romney agrees with you too.

I see you are from the reality where the Republican Senate repealed the laws of physics. The time-space continuum is altering already.

So what (1)

Anonymous Coward | about 4 months ago | (#47684661)

You don't need to constantly shrink everything. My computer is about 2 feet tall and wide. I don't care if it's a couple more inches in any direction. Make a giant processor that weighs 20 pounds.

Re:So what (1)

gl4ss (559668) | about 4 months ago | (#47684851)

shrinking can allow for higher speed.

that's what makes this article sound dumb just by the blurb(..that it takes x amount of time to get to the other side of the chip and thus the chip can't run faster bullcrap).

I mean, current overclocking records are way, way, wayyy over 5ghz. so what is the point?

Re:So what (3, Informative)

ledow (319597) | about 4 months ago | (#47685017)

Nobody says 5GHz is impossible. Read it.

It says that you can't traverse the entire chip while running at 5GHz. Most operations don't - why? Because the chips are small and any one set of instructions tends to operate in a certain smaller-again area.

What they are saying is that chips will no longer be synchronous - if chips get any bigger, your clock signal takes too long to traverse the entire length of the signal and you end up with different parts of the chips needing different clocks.

It's all linked. The size of the chip can get bigger and still pack in the same density, but then the signals get more out of sync, the voltages have to be higher, the traces have to be straighter, the routing becomes more complicated, and the heat will become higher. Oh, and you'll have to have parts of it "go dark" to avoid overheating neighbours, etc. This is exactly what the guy is saying.

At some point, there's a limit at which it's cheaper and easier to just have a bucket load of synchronous-clock chips tied together loosely than one mega-processor trying to keep everything ticking nicely.

And current overclocking records are only around 8GHz. Nobody says you can't make a processor operating at 10THz if you want. The problem is that it has to be TINY and not do very much. Frequency, remember, is high in anything dealing with radio - your wireless router can do some things at 5GHz and, somewhere inside it, is an oscillator doing just that. But not the SAME kinds of things as we expect modern processors to do.

Taking account that most of those overclocking benchmarks probably operate in small areas of the silicon, are run in mineral oil or similar and are the literal speed of a benchmark over a complicated chip that ALREADY takes account that signals take so long that clocks can get out of sync across the chip, we don't have much leeway at all. We hit a huge wall at 2-3GHz and that's where people are tending to stay despite it being - what, a decade or more? - since the first 3GHz Intel chip. We add more processors and more core and more threading but pretty much we haven't got "faster" over the last decade, we're just able to have more processors at that speed.

No doubt we can push it further, but not forever, and not with the kind of on-chip capabilities you expect now.

With current technology (i.e. no quantum leaps of science making their way into our processors), I doubt you'll ever see a commercially available 10GHz chip that'll run Windows. Super-parallel machines running at a fraction of that but performing more gigaflops per second - yeah - but basic core sustainable frequency? No.

Re:So what (1)

anarcobra (1551067) | about 4 months ago | (#47686037)

The reason processors are small is mostly due to yield. Silicon wafers have more or less a constant amount of defects per unit of area. What this means is that the larger your chip is, the lower the number of working processors you end up with. The smaller the chip the more working processors you end up with per wafer.

Duplicate article, ignore. (0)

Anonymous Coward | about 4 months ago | (#47684683)

Will our ever-increasing clock speeds allow us to post more and more duplicates?

http://tech.slashdot.org/story/14/08/14/1921238/can-our-computers-continue-to-get-smaller-and-more-powerful

Re:Duplicate article, ignore. (1)

leonardluen (211265) | about 4 months ago | (#47685277)

remember 512k is good enough for everyone.

we aren't quite there yet...

Lightspeed (1)

AJWM (19027) | about 4 months ago | (#47684685)

Yet another reason to find a way around the speed of light.

Actually I've always said (jokingly) that if anyone does find a way to go FTL, it'll be the computer chip manufacturers. In fact Brad Torgersen and I had a story to that effect in Analog magazine a couple of years ago, "Strobe Effect".

Re:Lightspeed (1)

cavreader (1903280) | about 4 months ago | (#47684847)

Mastering and ultimately harnessing quantum entanglement as it pertains to quantum computing and the limits we face right now go right out the window.

Re:Lightspeed (0)

Anonymous Coward | about 4 months ago | (#47685329)

quantum entanglement

Meaning that what we do with a particle at point A immediately becomes evident at point B. With no medium between them afecting information propogation.

Sorry. Not going to happen. If I set up my QE modem here and you set yours up there, the NSA isn't going to be happy about not having a piece of fiber they can splice into between us.

You CAN break the laws of physics (0)

Anonymous Coward | about 4 months ago | (#47684769)

Engineers hate being told stuff is impossible by Scientists. It just makes them mad, and more likely to actually do it.

Re:You CAN break the laws of physics (1)

Anonymous Coward | about 4 months ago | (#47684965)

Right, which is why we live in the leisure society with 10 hour workweeks, everyone has a flying car, a Star Trek replicator and personal warp drive space ships.

You are clueless. You live in a bubble of technology created by people infinitely smarter than you and you are happy with comic-book levels of understanding.

Density limit - not computational limit (2)

gman003 (1693318) | about 4 months ago | (#47684897)

Congratulations, you identified the densest possible circuits we can make. That doesn't even give an upper bound to Moore's Law, let alone an upper bound to performance.

Moore's Law is "the number of transistors in a dense integrated circuit doubles every two years". You can accomplish that by halving the size of the transistors, or by doubling the size of the chip. Some element of the latter is already happening - AMD and Nvidia put out a second generation of chips on the 28nm node, with greatly increased die sizes but similar pricing. The reliability and cost of the process node had improved enough that they could get a 50% improvement over the last gen at a similar price point, despite using essentially the same transistor size.

You could also see more fundamental shifts in technology. RSFQ seems like a very promising avenue. We've seen this sort of thing with the hard drive -> SSD transition for I/O bound problems. If memory-bound problems start becoming a priority (and transistors get cheap enough), we might see a shift back from DRAM to SRAM for main memory.

So yeah, the common restatement of Moore's Law as "computer performance per dollar will double every two years" will probably keep running for a while after we hit the physical bounds on transistor size.

Re:Density limit - not computational limit (0)

Anonymous Coward | about 4 months ago | (#47685397)

The real problem is effectively using multiple cores. Pretty much all modern programing languages can multithread, but multithreading efficiently is another matter. At some point, some part of the process often limits you, even if it is simple locking overhead for a queue. Labview has, for awhile, presented a nearly intuitive way to multithread things with its 2D graphical design. That being said, while I haven't benchmarked the current version, the coding style does have the severe downside that if you branch major structures out to let things run in parallel you end up copying entire structures and whatever is inside them continually, which pretty much destroys performance. Still, I tend to think that coding might continue to move that way, or possibly even move into three dimensional block diagrams. Labview's debugging tools, including its ability to create arbritrarily complex probes to view any particular datatype is second to none. That being said, if I want a large project to be maintanable and scale particularly well I still prefer C#.

That being said, if anyone can ever get something like the labview design view to run consistently as fast as C#, for arbitrarily complex code, then you might have something kind of nice that will scale well on multicore, yet be easy to program. I know they have added in an open source compiler in recent years and such. Careful coding can help a great deal as well. All in all Labview makes quick code that is often good enough to get the job done fast, but does not scale well. C# WPF makes the easy things hard and the hard things easy, while being more maintainable overall and better scaling. C just does things fast and ignores any pesky safety checks you don't code yourself, but is definetely where you want your highest performance code to be, assuming the overhead for calling into C isn't too bad, which in itself can be largely minimized.

To summarize, if we are going to continue down this massively parallel route, we really need simpler ways to insure we can use the resources thrown at us. Then again, the complexity requirement for the highest performing code does at least help insure some of us stay employed...

Re:Density limit - not computational limit (0)

Anonymous Coward | about 4 months ago | (#47685953)

>by doubling the size of the chip.

Yeah, no. ULSI and wafer scale integration were tried years ago and the economics simply don't work out. Chips at the top end are already as large as they can economically be.

Commenting on signal not crossing chip (0)

Anonymous Coward | about 4 months ago | (#47684925)

The article seems to be about limitations we have not yet hit. In this context it seems misleading to point out that a signal could not travel across a chip in one clock cycle if the clock is at 5 Ghz.

First, a little background:

Processors long ago started using a technique called pipelining to increase performance. It is possible to break the hardware task in performing instructions as simple as addition into multiple stages. In pipelining one starts one or more instructions each clock cycle, but instructions take several clock cycles to complete. It is only sometimes necessary to delay instructions for results from previous instructions. This can be avoid by tricks like giving one instruction data that has been computed as part of an earlier instruction but not yet stored in memory.

My point:

In a modern cpu, an instruction maybe read from memory in one clock cycle, the data the instruction needs read in another, the actual action such as addition in yet another, and storing to memory in yet another clock cycle. Doing instructions in more steps is seen in more complex processors. Even the same website as this article has another article from 2007 which says some processors have an instruction stage where the stage simple consists of propagating the signal.

    "include whole pipeline stages solely dedicated to propagating signals across the chip." http://arstechnica.com/gadgets/2007/05/the-pentium-4-remixed-taking-processors-into-the-third-dimension/

So not getting a signal across a chip in a single stage is far from being a limit we've not hit.

Brains (0)

Anonymous Coward | about 4 months ago | (#47684993)

Humans use about 15% of their brains at any given moment, not always the same 15%, we use all of it just a bit at a time. Reminds me of that, have it all there if you need it and only turn on the parts that are needed at any given moment. Silicon evolution has done in a matter of decades what it took evolution millions of years to accomplish, at least in this one tiny area.

Unconventional architectures and quantum computing (1)

earthforce_1 (454968) | about 4 months ago | (#47685109)

I see increasing emphasis in the future on unconventional architectures to solve certain problems
http://www.research.ibm.com/ar... [ibm.com]
http://en.wikipedia.org/wiki/Q... [wikipedia.org]

and a little further into the future, single molecule switches and gates.
http://en.wikipedia.org/wiki/M... [wikipedia.org]

We have a ways to go, but at some point we are going to have to say bye-bye to the conventional transistor.

What we need for efficiency (1)

hAckz0r (989977) | about 4 months ago | (#47685261)

The human brain is a marvel of technology. Brain waves move through it as waves of activity. It only consumes (most) energy where the wave of intensified activity is passing through it. If a 3d circuit could be made to sense when a signal is incoming then it could be more efficient. In this paradigm its no 1's and 0's, but rather circuit on vs circuit off. In addition, if you could turn those on/off cycles into charge pump circuits then you could essentially recycle the a partial of that charge and reuse it in a casade like or layered circuit. I believe Sun Micro was working on one such design, but the cost benifits were not there at the time to make it to production. Things have changed.

Power use is NOT proportional with voltage (1)

Anonymous Coward | about 4 months ago | (#47685635)

Maybe Markov should go back to school.. Power use is modeled as voltage squared, not as proportional.
Apologies to Markov if it is just the summary that is wrong.

Re:Power use is NOT proportional with voltage (1)

Mr Z (6791) | about 4 months ago | (#47686265)

That's true for active power. (V^2/R). For leakage power, it's even worse. That looks closer to exponential. [eetimes.com] I've seen chip for which leakage accounted for close to half the power budget.

Supposedly FinFET /Tri-gate will help dramatically with leakage. We'll see.

Is that really correct?? (1)

udippel (562132) | about 4 months ago | (#47685807)

Power use is proportional to the chip's operating voltage, and transistors simply cannot operate below a 200 milli-Volt level

Wow. To me it is like P~U^2. So proportional, but not linear.
And where would that 200 mV level come from? In my understanding it depends very much on the semiconductor used.

Seems simple enough (1)

jd (1658) | about 4 months ago | (#47685853)

You need single isotope silicon. Silicon-28 seems best. That will reduce the number of defects, thus increasing the chip size you can use, thus eliminating chip-to-chip communication, which is always a bugbear. That gives you effective performance increase.

You need better interconnects. Copper is way down on the list of conducting metals for conductivity. Gold and silver are definitely to be preferred. The quantities are insignificant, so price isn't an issue. Gold is already used to connect the chip to outlying pins, so metal softness isn't an issue either. Silver is trickier, but probably solvable.

People still talk about silicon-on-insulator and stressed silicon as new techniques. After ten bloody years? Get the F on with it! These are the people who are breaking Moore's Law, not physics. Drop 'em in the ocean for a Shark Week special or something. Whatever it takes to get people to do some work!

SoI, since insulators don't conduct heat either, can be made back-to-back, with interconnects running through the insulator. This would give you the ability to shorten distances to compute elements and thus effectively increase density.

More can be done off-cpu. There are plenty of OS functions that can b e shifted to silicon, but where the specialist chips have barely changed in years, if not decades. If you halve the number of transistors required on the CPU for a given task, you have doubled the effective number of transistors from the perspective of the old approach.

Finally, if we dump the cpu-centric view of computers that became obsolete the day the 8087 arrived (if not before), we can restructure the entire PC architecture to something rational. That will redistribute demand for capacity, to the point where we can actually beat Moore's Law on aggregate for maybe another 20 years.

By then, hemp capacitors and remsistors will be more widely available.

(Heat is only a problem for those still running computers above zero Celsius.)

Can you fit that in a laptop? (1)

tepples (727027) | about 4 months ago | (#47685985)

Heat is only a problem for those still running computers above zero Celsius.

Good luck fitting your frozen computer into a laptop case or something else that can be used while riding public transit. Not everybody is content to just "consume" on a "mobile device" while away from mains power.

Re:Seems simple enough (1)

ultranova (717540) | about 4 months ago | (#47686367)

Finally, if we dump the cpu-centric view of computers that became obsolete the day the 8087 arrived (if not before), we can restructure the entire PC architecture to something rational. That will redistribute demand for capacity, to the point where we can actually beat Moore's Law on aggregate for maybe another 20 years.

Please explain how your vision is different from, say, OpenCL?

popular science is back (1)

holophrastic (221104) | about 4 months ago | (#47686185)

one day, computers will be twice as fast and ten times as big -- vacuum tubes? meet transistors.
computers can't get any more popular because we'll run out of copper. . . zinc. . . nickel -- welcome to silicon. Is there enough sand for you?

everything will stay the way it is now forever. things will never get any faster because these issues that aren't problems today will eventually become completely insurmountable.

relax. take it easy. we don't solve problems in-advance. capitalism is about quickly solving huge problems, while totally ignoring small and medium problems.

wait for it. computers will be different in twenty years. I promise.

Why not integrate entire C-library functions? (0)

Anonymous Coward | about 4 months ago | (#47686209)

Given that we can now have almost as many transistors as we like, but are limited by clock speed (hence heat/power), why not make a chip with dedicated circuits to implement really high-level functions such as strtol(), printf() or array-search? There might be some hardware limit (eg printf() with more than 10 arguments has to fall back to software, or arrays can only have up to 500 elements with keys and values at most 100 characters long) - but such a processor would be capable of massive performance increases.

Re:Why not integrate entire C-library functions? (1)

Mr Z (6791) | about 4 months ago | (#47686335)

And you think printf() and strtol() are major bottlenecks worth dedicated silicon area why?

Modern CPUs already have many accelerators for high end functions, such as numerical computations, cryptography, and the all important memcpy. (Memory copies are a traditional bottleneck, and general enough that they can be easily offloaded.) They come in two forms—specialized SIMD/vector instruction sets, and dedicated blocks for high-level functions that take multiple microseconds. An example of the former are the SIMD-oriented AVX instructions found on modern x86 chips. As an example of the latter, chips aimed at high end signal processing often have discrete blocks such as FFT accelerators. Others aimed at network tasks (especially DPI) have regular expression engines.

The problem with accelerator blocks is that they do take up area. And if they're powered up, they leak. Leakage current is a significant factor in modern designs. To get faster transistors, you need to drive their threshold voltage down. As you lower the threshold voltage, their leakage current goes up exponentially. So, that circuit better be bringing a lot of bang for the buck if it's going to be sitting there taking up space and leaking.

Another issue with dedicating area to fixed functions is the impact it has on distance between functions on the die. In the Old Days, you could get anywhere on the die in a single clock cycle. With modern designs and modern clock rates, cross-die communication is slow, taking many many cycles. So, when you plop down your custom accelerator, you have to figure out where to put it. Do you put it right in the middle of the rest of the computational units, slowing down the communication between their functions (either lowering clock rate or increasing cycle counts), or do you put it on the other side of the cache, meaning it takes several cycles to send it a request and several cycles to see the result?

This is why many custom accelerator blocks out there today focus on meaty workloads. A large FFT still takes a good bit of time to execute, and there's usually other work the main CPU can do while it executes. Thus, the communication overhead doesn't tank your performance. printf(), on the other hand, generally shows up right in the middle of a bunch of other serial steps. You can't overlap that with anything. Hauling off to a printf() accelerator block generally would make zero sense. If you're really spending that much time in printf(), you're better off rewriting the code to use a less general facility.

A final issue with dedicated hardware is that you can't patch it. Someone finds a bug in your printf() and you're back to using a library version. I could go on, but I think I've made my point.

What a boring moron (0)

Anonymous Coward | about 4 months ago | (#47686361)

Apparently Nature publishes any old thing nowadays, if you've got a name. "We're doomed" and drawing a few graphs culled from statistical data is not an interesting paper. Alternatives, such as graphene and optical transistors, are an interesting alternative and yet appear nowhere in the paper. It's like discussing "peak horse" in 1907 while ignoring that next door Henry Ford keeps talking up his plans for something he keeps calling a "Model T"

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